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? semiconductor components industries, llc, 2005 october, 2005 ? rev. 1 1 publication order number: dac?08/d dac?08 series 8?bit high?speed multiplying d/a converter the dac-08 series of 8-bit monolithic multiplying digital-to- analog converters provide very high-speed performance coupled with low cost and outstanding applications flexibility. advanced circuit design achieves 70 ns settling times with very low glitch and at low power consumption. monotonic multiplying performance is attained over a wide 20-to-1 reference current range. matching to within 1 lsb between reference and full-scale currents eliminates the need for full-scale trimming in most applications. direct interface to all popular logic families with full noise immunity is provided by the high swing, adjustable threshold logic inputs. dual complementary outputs are provided, increasing versatility and enabling differential operation to effectively double the peak-to- peak output swing. true high voltage compliance outputs allow direct output voltage conversion and eliminate output op amps in many applications. all dac-08 series models guarantee full 8-bit monotonicity and linearities as tight as 0.1% over the entire operating temperature range. device performance is essentially unchanged over the 4.5 v to 18 v power supply range, with 37 mw power consumption attainable at 5.0 v supplies. the compact size and low power consumption make the dac-08 attractive for portable and military aerospace applications. features ? fast settling output current ? 70 ns ? full-scale current prematched to 1.0 lsb ? direct interface to ttl, cmos, ecl, htl, pmos ? relative accuracy to 0.1% maximum overtemperature range ? high output compliance ?10 v to +18 v ? true and complemented outputs ? wide range multiplying capability ? low fs current drift ? 10ppm/ c ? wide power supply range ? 4.5 v to 18 v ? low power consumption ? 37 mw at 5.0 v ? pb?free packages are available* applications ? 8-bit, 1.0 s a-to-d converters ? servo-motor and pen drivers ? waveform generators ? audio encoders and attenuators ? analog meter drivers ? programmable power supplies ? crt display drivers ? high-speed modems ? other applications where low cost, high speed and complete input/output versatility are required ? programmable gain and attenuation ? analog-digital multiplication *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting t echniques reference manual, solderrm/d. http://onsemi.com see detailed ordering and shipping information in the package dimensions section on page 13 of this data sheet. ordering information pin connections soic?16 d suffix case 751b pdip?16 n suffix case 648 16 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 n package d package* 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 v lc i o v? i o b 1 (msb) b 2 b 3 b 4 compen v ref? v ref+ v+ b 8 (lsb) b 7 b 6 b 5 v+ v ref+ v ref? compen v lc i o v? i o b 8 (lsb) b 7 b 6 b 5 b 4 b 3 b 2 b 1 (msb) (top view) (top view) *so and non?standard pinouts. see general marking information in the device marking section on page 13 of this data sheet. device marking information 16 1
dac?08 series http://onsemi.com 2 bias network current switches msb lsb v+ 13 1 5 6 7 8 9 10 11 12 14 15 16 3 4 2 comp. v? reference amplifier v ref (+) v ref (?) b 1 v lc b 2 b 3 b 4 b 5 b 6 b 7 b 8 i out + ? i out figure 1. block diagram pin function description pin # n package / d package symbol description 1/5 v lc logic control voltage 2/6 i o inverted output current 3/7 v? negative power supply 4/8 i o non?inverted output current 5/9 b 1 output 1, most significant bit (msb) 6/10 b 2 output 2 7/11 b 3 output 3 8/12 b 4 output 4 9/13 b 5 output 5 10/14 b 6 output 6 11/15 b 7 output 7 12/16 b 8 output 8, least significant bit (lsb) 13/1 v+ positive power supply 14/2 v ref+ positive ref erence voltage 15/3 v ref? negative reference voltage 16/4 compen compensator capacitor pin maximum ratings rating symbol value unit power supply voltage v+ to v? 36 v digital input v oltage v 5 ?v 12 v? to v? plus 36 v ? logic threshold control v lc v? to v+ ? applied output v oltage v 0 v? to +18 v reference current i 14 5.0 ma reference amplifier inputs v 14 , v 15 v ee to v cc ? maximum power dissipation t amb = 25 c (still-air) (note 1) n package d package p d 1450 1090 mw thermal resistance, junction?to?ambient n package d package r ja 75 105 c/w lead soldering temperature (10 sec max) t sold 230 c operating temperature range t amb 0 to +70 c operating junction temperature t j 150 c storage temperature range t stg ?65 to +150 c maximum ratings are those values beyond which device damage can occur. maximum ratings applied to the device are individual stress limi t values (not normal operating conditions) and are not valid simultaneously. if these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be af fected. 1. derate above 25 c, at the following rates: n package at 13.3 mw/ c d package at 9.5 mw/ c.
dac?08 series http://onsemi.com 3 dc electrical characteristics pin 3 must be at least 3.0 v more negative than the potential to which r 15 is returned. v cc = 15 v , i ref = 2.0 ma. output characteristics refer to both i out and i out unless otherwise noted. t amb = 0 c to 70 c. characteristic symbol test conditions dac?08c dac?08e unit min typ max min typ max resolution ? ? 8.0 8.0 8.0 8.0 8.0 8.0 bits monotonicity 8.0 8.0 8.0 8.0 8.0 8.0 relative accuracy ? overtemperature range ? ? 0.39 ? ? 0.19 %fs differential non-linearity ? ? 0.78 ? ? 0.39 full-scale t empco tci fs ? ? 10 ? ? 10 ? ppm/ c output voltage compliance v oc full-scale current change < 1/2lsb ?10 ? +18 ?10 ? +18 v full-scale current i fs4 v ref = 10.000 v; r 14 , r 15 = 5.000 k 1.94 1.99 2.04 1.94 1.99 2.04 ma full-scale symmetry i fss i fs4 -i fs2 ? 2.0 16 ? 1.0 8.0 a zero-scale current i zs ? ? 0.2 4.0 ? 0.2 2.0 a full-scale output current range i fsr r 14 , r 15 = 5.000 k v ref = +15 v, v? = ?10 v 2.1 ? ? 2.1 ? ? ma v ref = +25 v, v? = ?12 v 4.2 ? ? 4.2 ? ? ma logic input levels v lc = 0 v v low v il ? ? 0.8 ? ? 0.8 high v ih 2.0 ? ? 2.0 ? ? logic input current v lc = 0 v a low i il v in = ?10 v to +0.8 v ? ?2.0 ?10 ? ?2.0 ?10 high i ih v in = 2.0 v to 18 v ? 0.002 10 ? 0.002 10 logic input swing v is v? = ?15 v ?10 ? +18 ?10 ? +18 v logic threshold range v thr v s = 15 v ?10 ? +13.5 ?10 ? +13.5 v reference bias current i 15 ? ? ?1.0 ?3.0 ? ?1.0 ?3.0 a reference input slew rate dl/dt ? 4.0 8.0 ? 4.0 8.0 ? ma/ s power supply sensitivity i ref = 1.0 ma positive pssi fs+ v+ = 4.5 to 5.5 v, v? = ?15 v; v+ = 13.5 to 16.5 v, v? = ?15 v ? 0.0003 0.01 ? 0.0003 0.01 %fs/ %vs negative pssi fs? v? = ?4.5 to ?5.5 v, v+ = +15 v; v? = ?13.5 to ?16.5 v, v+ = +15 v ? 0.002 0.01 ? 0.002 0.01 %fs/ %vs power supply current ma positive i+ v s = 5.0 v, i ref = 1.0 ma ? 3.1 3.8 ? 3.1 3.8 negative i? ? ?4.3 ?5.8 ? ?4.3 ?5.8 positive i+ v s = +5.0 v, ?15 v, i ref = 2.0 ma ? 3.1 3.8 ? 3.1 3.8 negative i? ? ?7.1 ?7.8 ? ?7.1 ?7.8 positive i+ v s = 15 v, i ref = 2.0 ma ? 3.2 3.8 ? 3.2 3.8 negative i? ? ?7.2 ?7.8 ? ?7.2 ?7.8 power dissipation p d 5.0 v, i ref = 1.0 ma +5.0 v, ?15 v, i ref = 2.0 ma 15 v, i ref = 2.0 ma ? 37 48 ? 37 48 mw ? 122 136 ? 122 136 ? 156 174 ? 156 174
dac?08 series http://onsemi.com 4 dc electrical characteristics (continued) pin 3 must be at least 3.0 v more negative than the potential to which r 15 is returned. v cc = +15 v , i ref = 2.0 ma. output characteristics refer to both i out and i out unless otherwise noted. t amb = 0 c to 70 c. characteristic symbol test conditions dac?08h unit min typ max resolution ? ? 8.0 8.0 8.0 bits monotonicity 8.0 8.0 8.0 relative accuracy ? overtemperature range ? ? 0.1 %fs differential non-linearity ? ? 0.19 %fs full-scale t empco tci fs ? ? 10 50 ppm/ c output voltage compliance v oc full-scale current change 1/2lsb ?10 ? +18 v full-scale current i fs4 v ref = 10.000 v, r 14 , r 15 = 5.000 k 1.984 1.992 2.000 ma full-scale symmetry i fss i fs4 ?i fs2 ? 1.0 4.0 a zero-scale current i zs ? ? 0.2 1.0 a full-scale output current range i fsr r 14 , r 15 = 5.000 k v ref = +15 v, v? = ?10 v 2.1 ? ? ma v ref = +25 v, v?=?12 v 4.2 ? ? ma logic input levels v lc = 0 v v low v il ? ? 0.8 high v ih 2.0 ? ? logic input current v lc = 0 v a low i il v in = ?10 v to +0.8 v ? ?2.0 ?10 high i ih v in = 2.0 v to 18 v ? 0.002 10 logic input swing v is v? = ?15 v ?10 ? +18 v logic threshold range v thr v s = 15 v ?10 ? +13.5 v reference bias current i 15 ? ? ?1.0 ?3.0 a reference input slew rate dl/dt ? 4.0 8.0 ? ma/ s power supply sensitivity i ref = 1.0 ma positive pssi fs+ v+ = 4.5 to 5.5 v, v? = ?15 v; v+ = 13.5 to 16.5 v, v? = ?15 v ? 0.0003 0.01 %fs/%vs negative pssi fs? v? = ?4.5 to ?5.5 v, v+ = +15 v; v? = ?13.5 to ?16.5 v, v+ = +15 v ? 0.002 0.01 %fs/%vs power supply current ma positive i+ v s = 5.0 v, i ref = 1.0 ma ? 3.1 3.8 negative i? ? ?4.3 ?5.8 positive i+ v s = +5.0 v, ?15 v, i ref = 2.0 ma ? 3.1 3.8 negative i? ? ?7.1 ?7.8 positive i+ v s = 15 v, i ref = 2.0 ma ? 3.2 3.8 negative i? ? ?7.2 ?7.8 power dissipation p d 5.0 v, i ref = 1.0 ma ? 37 48 mw +5.0 v, ?15 v, i ref = 2.0 ma ? 122 136 15 v, i ref = 2.0 ma ? 156 174
dac?08 series http://onsemi.com 5 ac electrical characteristics characteristic symbol test conditions dac?08c dac?08e dac?08h unit min typ max min typ max min typ max settling time t s to 1/2lsb, all bits switched on or off, t amb = 25 c ? 70 135 ? 70 135 ? 70 135 ns propagation delay ns low-to-high t plh t amb = 25 c, each bit high-to-low t phl all bits switched ? 35 60 ? 35 60 ? 35 60 test circuits control logic dac-08 reference dac accuracy > 0.006% ne5534 error output v? v+ ? + 16 14 15 5-12 1 2 4 13 3 v ref r ref r f r15 figure 2. relative accuracy test circuit for settling time measurement (all bits switched low to high) use r l to gnd for turn off measurement settling time transient response e in 2.4 v 0.4 v 1.0 v 0 0 -100 mv 1.4 v r l = 500 r l = 50 pin 4 to gnd t s = 70 ns typical to 1/2 lsb t phl = t plh = 10 ns t phl t plh c o 25 pf 15 pf 5 6 7 8 9 10 11 12 3 13 14 15 1 2 4 16 dac-08 v ee v cc e in e o 0.1 f 0.1 f 0.1 f r l +2.0 v dc 1.0 k 1.0 k 51 figure 3. transient response and settling time
dac?08 series http://onsemi.com 6 test circuits 5 6 7 8 9 10 11 12 3 13 14 15 1 2 4 16 dac-08 v ee v cc 0.1 f open scope r eq = 200 r l r p r in v in di dt i r l dv dt slewing time 10% 90% 0 2.0 ma 2v 0 1 k figure 4. reference current slew rate measurement notes: (see text for values of c.) typical values of r 14 = r 15 = 1 k v ref = +2.0 v c = 15 pf v i and i i apply to inputs a 1 through a 8 the resistor tied to pin 15 is to temperature compensate the bias current and may not be necessary for all applications. i o k a 1 2 a 2 4 a 3 8 a 4 16 a 5 32 a 6 64 a 7 128 a 8 256 where k v ref r 14 and a n = ?1? if a n is at high level a n = ?0? if a n is at low level 5 6 7 8 9 10 11 12 3 13 14 15 1 2 4 16 dac-08 v cc digital inputs output i cc v o v ref (+) i o r l c v ee i ee v i i i (+) r 15 r 14 i 15 i 14 a 1 a 2 a 3 a 4 a 5 a 6 a 7 a 8 figure 5. notation definitions
dac?08 series http://onsemi.com 7 typical performance characteristics 10 i fs ? output full scale current (ma) 50ns/divisiom r eq = 200 , r l = 100 , cc = 0 2.0ma notes: curve 1: cc = 15pf, v in = 2.0v p-p centered at +1.0v curve 1: cc = 15pf, v in = 5m0v p-p centered at +200mv curve 1: cc = 15pf, v in = 100m0v p-p centered at 0v and applied through 50 connected to pin 14. +2.0v applied to r 14 . i ref ? reference current (ma) 5.0 4.0 3.0 2.0 1.0 0 0 1.0 2.0 3.0 4.0 5. 0 i ? output current (ma) fs t a = t min to t max all bits ?high? limit for v?=?15v limit for v?=?5v (00000000) (1 1111111 ) 0ma 1.0ma i out i out 3.2 2.8 2.4 2.0 1.6 1.2 0.8 0.4 0 output current (ma) output voltage (v) all bits on ?14 ?10 ?6 ?2 0 2 6 10 14 18 2.5v 0.5v ?0.5ma ?2.5ma v in i out 200ns/division bit 8 logic input i out 8 a 2.4v 0.4v 0v 0 all bits switched on output ? 1/2lsb settling +1/2lsb 0 2.4v 0.4v 50ns/divisiom i fs =2ma, r l =1k 1/2lsb=4 a 500 400 300 200 100 0 .05 .01 .02 .05 0.1 0.2 0.5 1.0 2.0 5.0 10 propagation delay (ns) 1lsb=78na 1lsb=7.8 a relative output (db) frequency (mhz) 6 4 2 0 ?2 ?4 ?6 ?8 ?10 ?12 ?14 0.1 0.2 0.5 1.0 2.0 5.0 r14=r15=1k 3 2 1 r l 500 all bits ?on? vr15 = 0v i ref = 0.2ma i ref = 1ma i ref = 2ma v? = ?15v v? = ?5v t a = t min to t max figure 6. output current vs. output voltage (output voltage compliance) figure 7. fast pulsed reference operation figure 8. true and complementary output operatio n figure 9. full?scale settling time figure 10. lsb switching figure 11. full?scale current vs. reference current figure 12. lsb propagation delay vs. ifs figure 13. reference input frequency response
dac?08 series http://onsemi.com 8 typical performance characteristics output current (ma) logic input voltage (v) logic input current ( a) 10,000 power supply current (ma) power supply current (ma) notes: b 1 through b 8 have identical transfer characteristics. bits are fully switched, with less than 1/2lsb error, at less than 100mv from actual threshold. these switching points are guaranteed to lie between 0.8 and 2.0v over the operating temperature range (v lc = 0.0v). 2.0 1.8 1.6 1.4 1.2 1.o 0.8 0.6 0.4 0.2 0 ?50 0 50 100 150 v ? v (v) thlc temperature ( c) 8 7 6 5 4 3 2 1 0 0 ?4.0 ?8.0 ?12 ?16 ?20 v? ? negative power supply (v dc ) i+ bits may be high or low i? with i ref = 2ma i? with i ref = 1ma i? with i ref = 0.2ma 8 7 6 5 4 3 2 1 0 ?50 0 50 100 150 temperature ( c) bits may be high or low i ref = 2.0ma i+ i? v+ = +15v v? = +15v 1,000 100 10 1 10 100 1000 c c (pf) f (khz) max 8.0 6.0 4.0 2.0 0 ?12 ?8 ?4 0 4 8 12 16 logic input voltage (v) 1.4 20 3.2 2.8 2.4 2.0 1.6 1.2 0.8 0.4 0 ?14 ?10 ?6 ?2 0 2 6 10 14 18 v 15 ? reference common mode voltage (v) positive common-mode range is always (v+) ?1.5v. i ref = 2ma t a = t min to t max i ref = 1ma i ref = 0.2ma v? = ?15v v? = ?5v v+ = +5v power supply current (ma) 8 7 6 5 4 3 2 1 0 ?50 0 50 100 150 v+ ? positive power supply (v dc ) all bits high or low i+ i? 1.2 1.0 0.8 0.6 0.4 0.2 0 ?12 ?8 ?4 0 4 8 12 16 output current (ma) i ref = 2.0ma b 1 b 2 b 3 b 4 b 5 v? = ?15v v? = ?5v shaded area indicates permissible output voltage range for v? = -15v, i ref 2.0ma for other v? or i ref see ?output current vs output voltage? curve on previous page temperature ( c) 16 12 8 4 0 ?4 ?8 ?12 ?50 0 50 100 150 output voltage (v) figure 14. reference amp common?mode range all bits on figure 15. logic input current vs. input voltage figure 16. v th ?v lc vs. temperature figure 17. output voltage compliance vs. temperature figure 18. bit transfer characteristics figure 19. power supply current vs. v+ figure 20. power supply current vs. v? figure 21. power supply current vs. temperature figure 22. maximum reference input frequency vs. compensation capacitor value
dac?08 series http://onsemi.com 9 notes: req = r in || r p typical values r in = 5k +v in = 10v pulsed referenced operation optional resistor for offset inputs no cap 14 15 16 2 4 +v ref r ref req =200 r p r in 0v figure 23. typical application functional description reference amplifier drive and compensation the reference amplifier input current must always flow into pin 14 regardless of the setup method or reference supply voltage polarity. connections for a positive reference voltage are shown in figure 2. the reference voltage source supplies the full reference current. for bipolar reference signals, as in the multiplying mode, r 15 can be tied to a negative voltage corresponding to the minimum input level. r 15 may be eliminated with only a small sacrifice in accuracy and temperature drift. the compensation capacitor value must be increased as r 14 value is increased. this is in order to maintain proper phase margin. for r 14 values of 1.0, 2.5, and 5.0 k , minimum capacitor values are 15, 37, and 75 pf, respectively. the capacitor may be tied to either v ee or ground, but using v ee increases negative supply rejection. (fluctuations in the negative supply have more effect on accuracy than do any changes in the positive supply.) a negative reference voltage may be used if r 14 is grounded and the reference voltage is applied to r 15 as shown. a high input impedance is the main advantage of this method. the negative reference voltage must be at least 3.0 v above the v ee supply. bipolar input signals may be handled by connecting r 14 to a positive reference voltage equal to the peak positive input level at pin 15. when using a dc reference voltage, capacitive bypass to ground is recommended. the 5.0 v logic supply is not recommended as a reference voltage, but if a well regulated 5.0 v supply which drives logic is to be used as the reference, r 14 should be formed of two series resistors with the junction of the two resistors bypassed with 0.1 f to ground. for reference voltages greater than 5.0 v, a clamp diode is recommended between pin 14 and ground. if pin 14 is driven by a high impedance such as a transistor current source, none of the above compensation methods applies and the amplifier must be heavily compensated, decreasing the overall bandwidth. output voltage range the voltage at pin 4 must always be at least 4.5 v more positive than the voltage of the negative supply (pin 3) when the reference current is 2.0 ma or less, and at least 8.0 v more positive than the negative supply when the reference current is between 2.0 ma and 4.0 ma. this is necessary to avoid saturation of the output transistors, which would cause serious accuracy degradation. output current range any time the full-scale current exceeds 2.0 ma, the negative supply must be at least 8.0 v more negative than the output voltage. this is due to the increased internal voltage drops between the negative supply and the outputs with higher reference currents. accuracy absolute accuracy is the measure of each output current level with respect to its intended value, and is dependent upon relative accuracy, full-scale accuracy and full-scale current drift. relative accuracy is the measure of each output current level as a fraction of the full-scale current after zero-scale current has been nulled out. the relative accuracy of the dac-08 series is essentially constant over the operating temperature range due to the excellent temperature tracking of the monolithic resistor ladder. the reference current may drift with temperature, causing a change in the absolute accuracy of output current. however, the dac-08 series has a very low full-scale current drift over the operating temperature range. the dac-08 series is guaranteed accurate to within lsb at +25 c at a full-scale output current of 1.992 ma. the relative accuracy test circuit is shown in figure 2. the 12-bit converter is calibrated to a full-scale output current of 1.99219 ma, then the dac-08 full-scale current is trimmed to the same value with r 14 so that a zero value appears at the error amplifier output. the counter is activated and the error band may be displayed on the oscilloscope, detected by comparators, or stored in a peak detector. two 8-bit d-to-a converters may not be used to construct a 16-bit accurate d-to-a converter. 16-bit accuracy implies a total of part in 65,536, or 0.00076%, which is much more accurate than the 0.19% specification of the dac-08 series. monotonicity a monotonic converter is one which always provides analog output greater than or equal to the preceding value for a corresponding increment in the digital input code. the dac-08 series is monotonic for all values of reference current above 0.5 ma. the recommended range for operation is a dc reference current between 0.5 ma and 4.0 ma.
dac?08 series http://onsemi.com 10 settling time the worst-case switching condition occurs when all bits are switched on, which corresponds to a low-to-high transition for all input bits. this time is typically 70 ns for settling to within lsb for 8-bit accuracy. this time applies when r l < 500 and c o < 25 pf. the slowest single switch is the least significant bit, which typically turns on and settles in 65 ns. in applications where the dac functions in a positive-going ramp mode, the worst-case condition does not occur and settling times less than 70 ns may be realized. extra care must be taken in board layout since this usually is the dominant factor in satisfactory test results when measuring settling time. short leads, 100 f supply bypassing for low frequencies, minimum scope lead length, and avoidance of ground loops are all mandatory. notes: d 1 , d 2 = in6263 or equivalent d 3 = in914 or equivalent c 1 = 0.01 f c 2 , c 3 = 0.1 f q 1 = 2n3904 c 4 , c 5 = 15pf and includes all probe and fixturing capacitance. v in v s + = +15v v adj v out v s ? = ?15v r 15 = 5k i ref = 2ma v ref = 10v r 14 = 5k v out r 1 = 1000 r 2 = 1000 r 3 = 500 50 c 1 c 2 c 5 c 3 d 3 d 1 d 2 c 4 dut 14 15 16 3 1 2 4 12 11 10 9 8 7 6 5 q 1 figure 24. settling time and propagation delay notes: i fs v ref r ref x 255 256 ;i o i o i fs for all logic states msb2 34567 lsb 5 6789101112 14 15 316 13 1 2 4 dac-08 (low t.c.) v+ v? i o i o +v ref i ref r ref c comp 0.1 f 0.1 f figure 25. basic dac?08 configuration
dac?08 series http://onsemi.com 11 notes: r 1 = low t.c. r 3 = r 1 + r 2 r 2 0.1 r 1 to minimize pot. contribution to full-scale drift 14 15 2 4 dac-08 v ref v+ v? r 4 = 1m r s = 20k r 3 r 2 r 1 figure 26. recommended full?scale and zero?scale adjust v out = 14 15 dac-08 ? + ne531 or equiv 0 to +10v i r = 2ma 4 2 5k 5k (low t.c.) figure 27. unipolar voltage output for low impedance output
dac?08 series http://onsemi.com 12 14 2 4 dac-08 i r = 2ma v out v out 5k 5k v = 10v 14 2 4 dac-08 i r = 2ma v out v out a. positive output b. negative output figure 28. unipolar voltage output for high impedance output 1 1 1 1 0 0 0 1 1 0 0 1 0 0 1 1 0 0 1 0 0 1 1 0 0 1 0 0 1 1 0 0 1 0 0 1 1 0 0 1 0 0 1 1 0 0 1 0 0 1 0 1 0 1 1 0 positive full-scale positive fs ? 1lsb + zero-scale + 1lsb zero-scale zero-scale ? 1lsb negative full scale ? 1lsb negative full scale ?9.920v ?9.840v ?0.080v 0.000 0.080 +9.920 +10.000 +10.000 +9.920 +0.160 +0.080 0.000 ?9.840 ?9.920 b 1 b 2 b 3 b 4 b 5 b 6 b 7 b 8 v out v out 14 2 4 dac-08 i r = 2ma v out v out 10k v = 10v 10k figure 29. basic bipolar output operation (offset binary)
dac?08 series http://onsemi.com 13 ordering information device description temperature range shipping ? dac?08ed 16?pin plastic small outline package 0 to +70 c 48 units/rail dac?08edg 16?pin plastic small outline package (pb?free) 0 to +70 c 48 units/rail dac?08edr2 16?pin plastic small outline package 0 to +70 c 2500 tape & reel dac?08edr2g 16?pin plastic small outline package (pb?free) 0 to +70 c 2500 tape & reel dac?08cn 16?pin plastic dual in?line package 0 to +70 c 25 units/rail dac?08cng 16?pin plastic dual in?line package (pb?free) 0 to +70 c 25 units/rail dac?08en 16?pin plastic dual in?line package 0 to +70 c 25 units/rail dac?08eng 16?pin plastic dual in?line package (pb?free) 0 to +70 c 25 units/rail dac?08hn 16?pin plastic dual in?line package 0 to +70 c 25 units/rail ?for information on tape and reel specifications, including part orientation and tap e sizes, please refer to our tape and reel packaging specification brochure, brd801 1/d. marking diagrams soic?16 d suffix case 751b pdip?16 n suffix case 648 a = assembly location wl = wafer lot yy, y = year ww = work week g = pb?free package dac?08edg awlyww dac?08cn awlyywwg dac?08en awlyywwg dac?08hn awlyywwg 16 1 16 1 16 1
dac?08 series http://onsemi.com 14 package dimensions soic?16 d suffix case 751b?05 issue j notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 18 16 9 seating plane f j m r x 45 g 8 pl p ?b? ?a? m 0.25 (0.010) b s ?t? d k c 16 pl s b m 0.25 (0.010) a s t dim min max min max inches millimeters a 9.80 10.00 0.386 0.393 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.229 0.244 r 0.25 0.50 0.010 0.019 pdip?16 n suffix case 648?08 issue t notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. ?a? b f c s h g d j l m 16 pl seating 18 9 16 k plane ?t? m a m 0.25 (0.010) t dim min max min max millimeters inches a 0.740 0.770 18.80 19.55 b 0.250 0.270 6.35 6.85 c 0.145 0.175 3.69 4.44 d 0.015 0.021 0.39 0.53 f 0.040 0.70 1.02 1.77 g 0.100 bsc 2.54 bsc h 0.050 bsc 1.27 bsc j 0.008 0.015 0.21 0.38 k 0.110 0.130 2.80 3.30 l 0.295 0.305 7.50 7.74 m 0 10 0 10 s 0.020 0.040 0.51 1.01 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, in cluding without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different a pplications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical e xperts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc prod uct could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney f ees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was neglig ent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2?9?1 kamimeguro, meguro?ku, tokyo, japan 153?0051 phone : 81?3?5773?3850 dac?08/d literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082?1312 usa phone : 480?829?7710 or 800?344?3860 toll free usa/canada fax : 480?829?7709 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.

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